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AD7928BRUZ

Manufacturer Part Number: AD7928BRUZ
Manufacturer/Brand: Analog Devices Inc.
Part of Description: IC ADC 12BIT SAR 20TSSOP
Datasheets: 1.AD7928BRUZ.pdf 2.AD7928BRUZ.pdf
RoHs Status: Lead free / RoHS Compliant
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  • Part NumberAD7928BRUZ
  • ManufacturerAnalog Devices Inc.
  • DescriptionIC ADC 12BIT SAR 20TSSOP
  • CategoryIntegrated Circuits (ICs) > Data Acquisition - Analog to Digital Converters (ADC)
  • Part Status17040 pcs Stock
  • Voltage - Supply, Digital2.7V ~ 5.25V
  • Voltage - Supply, Analog2.7V ~ 5.25V
  • Supplier Device Package20-TSSOP
  • Series-
  • Sampling Rate (Per Second)1M
  • Reference TypeExternal
  • Ratio - S/H:ADC1:1
  • Package / Case20-TSSOP (0.173', 4.40mm Width)
  • PackageTube
  • Operating Temperature-40°C ~ 85°C
  • Number of Inputs8
  • Number of Bits12
  • Number of A/D Converters1
  • Mounting TypeSurface Mount
  • Input TypeSingle Ended
  • Features-
  • Data InterfaceSPI, DSP
  • ConfigurationMUX-S/H-ADC
  • Base Product NumberAD7928
  • ArchitectureSAR
  • AD7928BRUZ Details PDFAD7928BRUZ PDF - DE.pdf

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Analog Devices AD7908/AD7918/AD7928 Series: High-Performance 8-Channel Successive Approximation ADCs for Multi-Signal Acquisition Applications

Product Overview of the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series represents a family of high-speed, low-power analog-to-digital converters designed by Analog Devices for applications requiring simultaneous acquisition of multiple analog signals. These successive approximation ADCs are available in three resolution variants: 8-bit (AD7908), 10-bit (AD7918), and 12-bit (AD7928), allowing system designers to select the appropriate precision level for their specific application requirements.

The AD7908/AD7918/AD7928 series operates from a single power supply ranging from 2.7 V to 5.25 V, making them suitable for both legacy 5 V systems and modern 3.3 V or lower voltage designs. Each device integrates eight single-ended analog input channels, eliminating the need for external multiplexing in many applications. The series achieves throughput rates up to 1 MSPS (million samples per second), positioning these converters for real-time signal acquisition in industrial, automotive, and consumer applications.

The devices are packaged in a compact 20-lead TSSOP (thin shrink small outline package) with a width of 4.40 mm, facilitating integration into space-constrained designs. The AD7908/AD7918/AD7928 series has been qualified for automotive applications, meeting the stringent reliability requirements of the automotive industry.

Architecture and Operating Principles of the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series employs a successive approximation architecture combined with an integrated track-and-hold amplifier. This architecture enables the devices to sample analog signals and convert them to digital form through a binary search algorithm, which systematically narrows the conversion range until the digital equivalent of the input signal is determined.

The track-and-hold amplifier within the AD7908/AD7918/AD7928 series provides a wide input bandwidth exceeding 8 MHz, allowing the devices to accurately capture high-frequency signal components. The track-and-hold acquisition time is specified at 300 nanoseconds for both sinusoidal and full-scale step inputs, ensuring rapid response to changing input signals.

The conversion process in the AD7908/AD7918/AD7928 series is initiated by the falling edge of the chip select (CS) signal, with the input signal sampled at this precise moment. The conversion time is fixed at 800 nanoseconds maximum, corresponding to 16 serial clock cycles when the serial clock operates at 20 MHz. This deterministic conversion timing eliminates pipeline delays, meaning the converted data is immediately available without waiting for subsequent conversions to complete.

The AD7908/AD7918/AD7928 series incorporates a sequencer control logic that manages the automatic cycling through a preprogrammed sequence of input channels. This sequencer reduces the software overhead required to manage multi-channel conversions, as the device automatically advances to the next channel in the sequence after each conversion completes.

Resolution and Accuracy Specifications of the AD7908/AD7918/AD7928 Series

The three variants of the AD7908/AD7918/AD7928 series provide different resolution levels to accommodate varying application requirements. The AD7908 offers 8-bit resolution, the AD7918 provides 10-bit resolution, and the AD7928 delivers 12-bit resolution. Resolution directly determines the smallest voltage change the converter can distinguish; higher resolution enables detection of smaller signal variations.

For the AD7908 8-bit variant, the integral nonlinearity (INL) is specified at ±0.2 LSB maximum, and differential nonlinearity (DNL) is also ±0.2 LSB maximum, with guaranteed no missed codes across the full 8-bit range. The offset error is ±0.5 LSB maximum, while gain error is ±0.2 LSB maximum.

The AD7918 10-bit variant exhibits integral nonlinearity of ±0.5 LSB maximum and differential nonlinearity of ±0.5 LSB maximum, with guaranteed no missed codes to 10 bits. Offset error increases to ±2 LSB maximum due to the increased resolution, while gain error is ±0.5 LSB maximum.

The AD7928 12-bit variant, offering the highest resolution, specifies integral nonlinearity at ±1 LSB maximum and differential nonlinearity at −0.9/+1.5 LSB maximum, with guaranteed no missed codes to 12 bits. The offset error for the AD7928 is ±8 LSB maximum (typically ±0.5 LSB), and gain error is ±1.5 LSB maximum.

All three variants of the AD7908/AD7918/AD7928 series support two input range configurations. The first configuration allows input signals from 0 V to REFin (the reference input voltage), with straight binary output coding. The second configuration supports input signals from 0 V to 2 × REFin, also with straight binary output coding. Additionally, the devices can be configured for bipolar input signals ranging from −REFin to +REFin, biased about REFin, with twos complement output coding.

The dynamic performance of the AD7908/AD7918/AD7928 series is characterized by signal-to-noise-plus-distortion (SINAD) measurements. The AD7908 achieves 49 dB minimum SINAD at 50 kHz input frequency with 20 MHz serial clock. The AD7918 provides 61 dB minimum SINAD under the same conditions. The AD7928 delivers 70 dB minimum SINAD at 5 V supply voltage, with 69 dB minimum SINAD at 3 V supply voltage. These SINAD values indicate the quality of the conversion process and the device's ability to preserve signal fidelity while rejecting noise and distortion.

Total harmonic distortion (THD) specifications further characterize the linearity of the conversion process. The AD7908 exhibits −66 dB maximum THD, the AD7918 shows −72 dB maximum THD, and the AD7928 demonstrates −77 dB maximum THD at 5 V supply voltage. Peak harmonic or spurious noise floor (SFDR) is −64 dB maximum for the AD7908, −74 dB maximum for the AD7918, and −78 dB maximum for the AD7928 at 5 V supply voltage.

Input Configuration and Signal Handling in the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series provides eight single-ended analog input channels, each capable of accepting signals referenced to ground. Single-ended inputs simplify the signal conditioning requirements compared to differential input architectures, as only one signal line per channel is required.

The input voltage range for each channel of the AD7908/AD7918/AD7928 series is determined by the RANGE configuration bit and the reference voltage. When RANGE is set to 1, the input range is 0 V to REFin. When RANGE is set to 0, the input range extends to 0 V to 2 × REFin, providing greater dynamic range for applications requiring measurement of larger voltage variations.

The input impedance of the AD7908/AD7918/AD7928 series is determined by the track-and-hold amplifier and the input multiplexer. The input capacitance is specified at 20 pF typical, and the DC leakage current is ±1 μA maximum. These specifications indicate that the input stage presents a relatively high impedance to the signal source, minimizing loading effects on the analog signal conditioning circuitry.

The full power bandwidth of the AD7908/AD7918/AD7928 series is 8.2 MHz at the 3 dB point, indicating the frequency range over which the device can accurately convert signals at full amplitude. At the 0.1 dB point, the bandwidth is 1.6 MHz, representing the range where signal attenuation remains minimal.

The aperture delay of the AD7908/AD7918/AD7928 series is specified at 10 nanoseconds typical, representing the time between the sampling command and the actual moment the input signal is captured. The aperture jitter is 50 picoseconds typical, indicating the timing uncertainty in the sampling process. Low aperture jitter is important for applications involving high-frequency signal acquisition, as timing uncertainty directly translates to signal-dependent noise.

Conversion Rate and Throughput Performance of the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series achieves a maximum throughput rate of 1 MSPS, meaning the device can complete one conversion and deliver the result every microsecond. This throughput rate is independent of the resolution variant; all three members of the series (AD7908, AD7918, and AD7928) operate at the same maximum conversion speed.

The conversion time for the AD7908/AD7918/AD7928 series is 800 nanoseconds maximum, corresponding to 16 serial clock cycles when the serial clock operates at 20 MHz. This fixed conversion time is determined by the successive approximation algorithm, which requires a fixed number of clock cycles to complete the binary search process. The conversion time can be reduced by increasing the serial clock frequency, allowing faster conversions when the application permits.

The track-and-hold acquisition time of 300 nanoseconds ensures that the input signal is fully settled within the track-and-hold circuit before conversion begins. This acquisition time applies to both sinusoidal inputs and full-scale step inputs, indicating consistent performance across different signal types.

The absence of pipeline delays in the AD7908/AD7918/AD7928 series means that the converted data is available immediately after the conversion completes, without waiting for subsequent conversions to propagate through the device. This characteristic simplifies system timing and eliminates the need for complex buffering schemes in applications requiring immediate access to conversion results.

Power Management and Efficiency in the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series incorporates multiple power management modes to optimize energy consumption across different operating scenarios. In normal operational mode at maximum throughput (1 MSPS with 20 MHz serial clock), the AD7908 and AD7918 consume 2.7 mA maximum at 5 V supply voltage and 2 mA maximum at 3 V supply voltage. The AD7928 exhibits identical power consumption specifications in normal operational mode.

The static power consumption in normal mode (with serial clock running but no conversions occurring) is 600 μA typical across all three variants of the AD7908/AD7918/AD7928 series, measured with the supply voltage ranging from 2.7 V to 5.25 V.

For applications operating at reduced throughput rates, the AD7908/AD7918/AD7928 series offers an auto shutdown mode. When configured for 250 kSPS (kilosamples per second) throughput, the auto shutdown mode reduces typical current consumption to 960 μA. The power dissipation in auto shutdown mode is 2.5 μW maximum at 5 V supply voltage and 1.5 μW maximum at 3 V supply voltage.

The full shutdown mode provides the lowest power consumption option, with current consumption of 0.5 μA maximum (20 nA typical) regardless of whether the serial clock is running. Power dissipation in full shutdown mode is 2.5 μW maximum at 5 V supply voltage and 1.5 μW maximum at 3 V supply voltage.

At maximum throughput with 3 V supply voltage, the AD7908/AD7918/AD7928 series dissipates just 6 mW of power maximum. With 5 V supply voltage at maximum throughput, power dissipation reaches 14.6 mW maximum. These low power consumption figures enable battery-powered applications and reduce thermal management requirements in space-constrained designs.

The power consumption of the AD7908/AD7918/AD7928 series is directly proportional to the serial clock frequency. By reducing the serial clock speed, designers can lower power consumption when maximum throughput is not required. This flexible power management approach allows the device to adapt to varying application demands without requiring external power management circuitry.

Serial Interface and System Integration of the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series employs a high-speed serial interface compatible with SPI (Serial Peripheral Interface), QSPI (Quad SPI), and MICROWIRE protocols, as well as DSP (Digital Signal Processor) interfaces. This broad compatibility simplifies integration with a wide range of microcontrollers, microprocessors, and DSP devices.

The serial interface of the AD7908/AD7918/AD7928 series uses three primary signals: SCLK (serial clock), DIN (data input), and DOUT (data output). The chip select (CS) signal controls the timing of the conversion process and the serial data transfer. The conversion is initiated on the falling edge of CS, and the input signal is sampled at this moment.

The VDRIVE pin on the AD7908/AD7918/AD7918 series allows the serial interface logic levels to be independent of the analog supply voltage (AVDD). This feature enables direct connection to either 3 V or 5 V processor systems regardless of the AVDD voltage selected. For example, a system might operate the analog circuitry at 5 V for maximum performance while running the digital processor at 3.3 V, with the AD7908/AD7918/AD7928 series bridging the voltage domains through the VDRIVE pin.

The logic input thresholds for the AD7908/AD7918/AD7928 series are specified relative to VDRIVE. The input high voltage threshold is 0.7 × VDRIVE minimum, and the input low voltage threshold is 0.3 × VDRIVE maximum. The input current is ±1 μA maximum, typically 10 nanoamperes at 0 V or VDRIVE.

The logic output levels are also referenced to VDRIVE. The output high voltage is VDRIVE − 0.2 V minimum (with 200 μA source current), and the output low voltage is 0.4 V maximum (with 200 μA sink current). The floating-state leakage current is ±1 μA maximum, and the floating-state output capacitance is 10 pF maximum.

Channel Sequencing and Flexible Configuration in the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series incorporates an integrated sequencer that automatically cycles through a preprogrammed sequence of input channels. This sequencer eliminates the need for software to manually select each channel before conversion, reducing processor overhead and enabling more efficient multi-channel data acquisition.

The sequencer in the AD7908/AD7918/AD7928 series can be configured through the control register to select which channels are included in the conversion sequence and the order in which they are converted. After each conversion completes, the sequencer automatically advances to the next channel in the sequence. When the end of the sequence is reached, the sequencer returns to the beginning and repeats the cycle.

The shadow register in the AD7908/AD7918/AD7928 series stores the configuration settings for the sequencer and other device parameters. The control register allows the processor to modify these settings, including the input range selection (RANGE bit), output coding format (straight binary or twos complement), and sequencer configuration.

The channel-to-channel isolation in the AD7908/AD7918/AD7928 series is specified at −85 dB typical, indicating that signals on one input channel have minimal coupling to other channels. This high isolation ensures that conversions on different channels do not interfere with each other, maintaining data integrity in multi-channel applications.

Reference Input and Voltage Range Selection in the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series requires an external reference voltage applied to the REFin pin. The reference input voltage is specified at 2.5 V ±1% for guaranteed performance. The reference input impedance is 36 kΩ typical when sampling at 1 MSPS, and the DC leakage current is ±1 μA maximum.

The reference voltage determines the full-scale input range of the AD7908/AD7918/AD7928 series. When the RANGE bit is set to 1, the input range is 0 V to REFin. When the RANGE bit is set to 0, the input range extends to 0 V to 2 × REFin. This flexibility allows designers to optimize the input range for their specific application without requiring external scaling circuitry.

For applications requiring bipolar input signals, the AD7908/AD7918/AD7928 series can be configured with twos complement output coding. In this configuration, the input range is −REFin to +REFin, biased about REFin. This capability enables direct measurement of signals that swing both above and below ground potential.

The reference input of the AD7908/AD7918/AD7928 series should be bypassed with a capacitor to minimize noise and ensure stable operation. The reference input impedance of 36 kΩ typical means that the reference source should have low output impedance to maintain voltage stability during the sampling process.

Thermal Characteristics and Operating Conditions of the AD7908/AD7918/AD7928 Series

The AD7908/AD7918/AD7928 series is specified for operation over the temperature range of −40°C to +85°C (B version), covering industrial and automotive temperature ranges. The device performance remains within specification across this entire temperature range, though some parameters may exhibit temperature-dependent variations.

The absolute maximum ratings for the AD7908/AD7918/AD7928 series define the limits beyond which the device may be damaged. The supply voltage (AVDD and VDRIVE) must not exceed 5.5 V, and the input voltage on any pin must not exceed AVDD + 0.3 V or fall below −0.3 V. The storage temperature range is −65°C to +150°C.

The AD7908/AD7918/AD7928 series incorporates electrostatic discharge (ESD) protection on all pins. The ESD caution rating indicates the device's sensitivity to electrostatic discharge events. Proper handling procedures, including the use of grounded wrist straps and conductive work surfaces, are recommended during assembly and testing to prevent ESD damage.

The power dissipation of the AD7908/AD7918/AD7928 series directly affects the thermal environment. At maximum throughput with 5 V supply voltage, the device dissipates up to 14.6 mW, which typically requires minimal thermal management in most applications. In shutdown modes, power dissipation drops to 2.5 μW maximum at 5 V, allowing the device to operate in battery-powered systems with minimal impact on battery life.

Conclusion

The Analog Devices AD7908/AD7918/AD7928 series provides a versatile platform for multi-channel analog signal acquisition across a range of resolution and performance requirements. The three resolution variants enable designers to select the appropriate precision level for their specific application, from 8-bit basic measurements to 12-bit high-precision conversions. The integration of eight single-ended input channels with an automatic sequencer simplifies system design and reduces processor overhead in multi-channel applications.

The combination of high throughput (1 MSPS), low power consumption (6 mW at 3 V maximum), and flexible power management modes positions the AD7908/AD7918/AD7928 series for applications ranging from portable battery-powered devices to industrial control systems. The broad serial interface compatibility and independent VDRIVE pin facilitate seamless integration with diverse processor platforms and voltage domains. The automotive qualification and wide operating temperature range extend the applicability of the AD7908/AD7918/AD7928 series to demanding automotive and industrial environments.

Frequently Asked Questions (FAQ)

Q1. What is the difference between the AD7908, AD7918, and AD7928 variants of the AD7908/AD7918/AD7928 series?
A1. The three variants differ primarily in resolution and dynamic performance. The AD7908 provides 8-bit resolution with 49 dB minimum SINAD, the AD7918 offers 10-bit resolution with 61 dB minimum SINAD, and the AD7928 delivers 12-bit resolution with 70 dB minimum SINAD at 5 V supply voltage. All three variants share the same 1 MSPS maximum throughput rate, eight input channels, and identical power consumption specifications. The choice between variants depends on the required measurement precision and signal quality requirements of the application.
Q2. Can the AD7908/AD7918/AD7928 series operate from a 3.3 V supply voltage?
A2. Yes, the AD7908/AD7918/AD7928 series is specified to operate from supply voltages ranging from 2.7 V to 5.25 V, which includes 3.3 V operation. At 3 V supply voltage with maximum throughput (1 MSPS), the device consumes 2 mA maximum current and dissipates 6 mW maximum power. The VDRIVE pin can be independently set to 3.3 V to interface with 3.3 V digital systems while operating the analog circuitry at a different voltage if desired.
Q3. What is the maximum input frequency that the AD7908/AD7918/AD7928 series can accurately convert?
A3. The full power bandwidth of the AD7908/AD7918/AD7928 series is 8.2 MHz at the 3 dB point, indicating that the device can accurately convert signals up to approximately 8.2 MHz at full amplitude. At the 0.1 dB point, the bandwidth is 1.6 MHz, representing the range where signal attenuation remains below 0.1 dB. The track-and-hold amplifier provides a wide input bandwidth exceeding 8 MHz, enabling the device to capture high-frequency signal components. For applications requiring conversion of signals above 8 MHz, external anti-aliasing filtering may be necessary to prevent aliasing errors.
Q4. How does the sequencer in the AD7908/AD7918/AD7928 series reduce processor overhead?
A4. The sequencer in the AD7908/AD7918/AD7928 series automatically cycles through a preprogrammed sequence of input channels without requiring software intervention between conversions. After each conversion completes, the sequencer automatically advances to the next channel in the sequence. This eliminates the need for the processor to issue a channel selection command before each conversion, reducing the number of instructions required to acquire data from multiple channels. For example, in a system acquiring data from all eight channels at 1 MSPS, the sequencer reduces processor overhead by automatically managing channel selection, allowing the processor to focus on data processing rather than channel management.
Q5. What is the purpose of the VDRIVE pin on the AD7908/AD7918/AD7928 series?
A5. The VDRIVE pin allows the serial interface logic levels to be independent of the analog supply voltage (AVDD). This feature enables direct connection to processor systems operating at different voltage levels than the analog supply. For example, a system might operate the analog circuitry at 5 V for maximum performance while running the digital processor at 3.3 V. By setting VDRIVE to 3.3 V, the AD7908/AD7918/AD7928 series automatically adjusts the logic input and output thresholds to match the 3.3 V processor levels, eliminating the need for external level-shifting circuitry.
Q6. How does the AD7908/AD7918/AD7928 series handle bipolar input signals?
A6. The AD7908/AD7918/AD7928 series can be configured to accept bipolar input signals ranging from −REFin to +REFin by setting the output coding to twos complement format through the control register. In this configuration, the input signal is biased about REFin, allowing measurement of signals that swing both above and below ground potential. For example, with a 2.5 V reference voltage and twos complement coding, the device can measure signals ranging from −2.5 V to +2.5 V. The zero code error specification (±8 LSB maximum for AD7928, typically ±0.8 LSB) indicates the accuracy of the zero crossing point in bipolar mode.
Q7. What is the conversion time for the AD7908/AD7918/AD7928 series, and can it be reduced?
A7. The conversion time for the AD7908/AD7918/AD7928 series is 800 nanoseconds maximum, corresponding to 16 serial clock cycles when the serial clock operates at 20 MHz. The conversion time can be reduced by increasing the serial clock frequency. For example, with a 40 MHz serial clock, the conversion time would be reduced to 400 nanoseconds. However, increasing the serial clock frequency increases power consumption proportionally. The conversion time is independent of the resolution variant; all three members of the series (AD7908, AD7918, and AD7928) require the same 800 nanoseconds at 20 MHz serial clock.
Q8. How does the AD7908/AD7918/AD7928 series minimize power consumption in battery-powered applications?
A8. The AD7908/AD7918/AD7928 series provides multiple power management modes to optimize energy consumption. In full shutdown mode, the device consumes only 0.5 μA maximum current (20 nA typical), allowing battery-powered systems to maintain the device in a low-power state when conversions are not required. The auto shutdown mode reduces power consumption to 960 μA typical when operating at reduced throughput rates (250 kSPS). Additionally, power consumption is directly proportional to the serial clock frequency, so reducing the clock speed when maximum throughput is not required further reduces power consumption. At 3 V supply voltage with maximum throughput, the device dissipates only 6 mW maximum, enabling extended battery life in portable applications.
Q9. What reference voltage should be used with the AD7908/AD7918/AD7928 series?
A9. The AD7908/AD7918/AD7928 series requires an external reference voltage applied to the REFin pin. The reference input voltage is specified at 2.5 V ±1% for guaranteed performance. The reference voltage determines the full-scale input range of the device. When the RANGE bit is set to 1, the input range is 0 V to REFin. When the RANGE bit is set to 0, the input range extends to 0 V to 2 × REFin. The reference input impedance is 36 kΩ typical, so the reference source should have low output impedance to maintain voltage stability. The reference input should be bypassed with a capacitor to minimize noise and ensure stable operation.
Q10. What is the channel-to-channel isolation specification for the AD7908/AD7918/AD7928 series, and why is it important?
A10. The channel-to-channel isolation for the AD7908/AD7918/AD7928 series is specified at −85 dB typical, indicating that signals on one input channel have minimal coupling to other channels. This high isolation ensures that conversions on different channels do not interfere with each other, maintaining data integrity in multi-channel applications. For example, in a system measuring eight independent sensor signals simultaneously, the −85 dB isolation ensures that a large signal on one channel does not corrupt the measurement on an adjacent channel. This specification is particularly important in applications involving high-frequency signals or high-impedance sensor inputs, where cross-talk between channels could introduce measurement errors.
Q11. How does the aperture jitter of the AD7908/AD7918/AD7928 series affect high-frequency signal acquisition?
A11. The aperture jitter of the AD7908/AD7918/AD7928 series is specified at 50 picoseconds typical, representing the timing uncertainty in the sampling process. Aperture jitter directly translates to signal-dependent noise in high-frequency applications. For example, when sampling a 1 MHz sinusoidal signal with 50 ps aperture jitter, the timing uncertainty introduces a noise component proportional to the signal's rate of change. The low aperture jitter specification of 50 ps ensures that this noise contribution remains minimal even for high-frequency signals. In applications involving signals above 1 MHz, the aperture jitter becomes increasingly important, and the 50 ps specification indicates that the AD7908/AD7918/AD7928 series is suitable for such applications.
Q12. What is the significance of the "no pipeline delay" characteristic of the AD7908/AD7918/AD7928 series?
A12. The absence of pipeline delays in the AD7908/AD7918/AD7928 series means that the converted data is available immediately after the conversion completes, without waiting for subsequent conversions to propagate through the device. This characteristic simplifies system timing and eliminates the need for complex buffering schemes. In contrast, pipelined ADCs introduce delays between the conversion initiation and data availability, requiring the processor to account for this latency when managing multi-channel conversions. The no-pipeline-delay architecture of the AD7908/AD7918/AD7928 series enables deterministic timing, making it easier to synchronize data acquisition with external events or other system operations.
Q13. Can the AD7908/AD7918/AD7928 series be used in automotive applications?
A13. Yes, the AD7908/AD7918/AD7928 series has been qualified for automotive applications, meeting the stringent reliability requirements of the automotive industry. The device operates over the temperature range of −40°C to +85°C, covering the extended temperature range required for automotive environments. The automotive qualification indicates that the device has undergone additional testing and validation to ensure reliability in automotive systems, including exposure to temperature cycling, vibration, and other environmental stresses typical of automotive applications. The compact 20-lead TSSOP package facilitates integration into automotive control modules and sensor interface circuits.
Q14. What is the track-and-hold acquisition time of the AD7908/AD7918/AD7928 series, and why is it important?
A14. The track-and-hold acquisition time of the AD7908/AD7918/AD7928 series is specified at 300 nanoseconds maximum for both sinusoidal and full-scale step inputs. This acquisition time represents the time required for the input signal to settle within the track-and-hold circuit after the sampling command is issued. A shorter acquisition time enables faster conversions and higher throughput rates. The 300 nanosecond specification ensures that the input signal is fully settled before conversion begins, preventing errors that could result from incomplete signal settling. The consistent acquisition time for both sinusoidal and step inputs indicates that the track-and-hold circuit performs reliably across different signal types.
Q15. How should the reference input of the AD7908/AD7918/AD7928 series be bypassed to ensure stable operation?
A15. The reference input of the AD7908/AD7918/AD7928 series should be bypassed with a capacitor to minimize noise and ensure stable operation. The reference input impedance of 36 kΩ typical means that the reference source should have low output impedance to maintain voltage stability during the sampling process. A bypass capacitor (typically 0.1 μF to 1 μF ceramic or film capacitor) placed close to the REFin pin reduces high-frequency noise on the reference voltage, which could otherwise introduce errors in the conversion process. The bypass capacitor should be connected between the REFin pin and ground, with short traces to minimize parasitic inductance. In applications requiring very low noise performance, a larger bypass capacitor (10 μF or greater) may be used in parallel with the smaller bypass capacitor to provide additional noise filtering.
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User Review

  • Kevi***rner

    Very good MCU for legacy embedded projects. I used the LPC2387FBD100 in an industrial control board replacement and it integrated more smoothly than expected. Ethernet and peripheral support were enough for our needs. Been running continuously for over a week without instability.

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    April 23th, 2026

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FAQFrequently Asked Questions

  • What are the critical design considerations when using the AD7928BRUZ in a high-channel-count data acquisition system with mixed analog and digital supply voltages? The AD7928BRUZ supports a wide analog and digital supply range of 2.7V to 5.25V, allowing flexible integration into mixed-voltage systems. However, engineers must ensure that the digital I/O voltage levels are compatible with the host controller—particularly when operating the ADC at 5.25V while interfacing with a 3.3V microcontroller. Level shifting or series current-limiting resistors may be required on SPI lines to prevent overvoltage stress. Additionally, simultaneous switching noise from the digital interface can couple into the analog inputs; proper grounding, separation of analog and digital planes, and use of bypass capacitors (100nF ceramic + 10µF tantalum) near both supply pins are essential to maintain 12-bit linearity.
  • How does the external reference voltage requirement of the AD7928BRUZ impact system accuracy and stability in precision measurement applications? Since the AD7928BRUZ uses an external reference, the overall system accuracy is directly dependent on the reference’s initial tolerance, temperature drift, and noise performance. For 12-bit precision, a low-drift (<10 ppm/°C), low-noise reference such as the ADR43x or REF50xx series is recommended. Any ripple or instability on the reference pin will manifest as code-dependent errors across the input range. Place the reference close to the REF pin with minimal trace length and guard it from digital return currents to avoid introducing differential noise that degrades ENOB.
  • Can the AD7928BRUZ sustain its 1 MSPS sampling rate across all eight single-ended inputs without performance degradation? The AD7928BRUZ achieves 1 MSPS only on a single channel in continuous conversion mode. When multiplexing across all eight inputs, the effective throughput per channel drops significantly due to multiplexer settling time and acquisition phase constraints. The internal sample-and-hold has a 55-clock acquisition window relative to the total conversion cycle, meaning faster sampling reduces time available for input settling—especially with high-impedance sources. For multi-channel operation, buffer amplifiers or lower source impedances (<2 kΩ) are required to avoid gain and offset errors, particularly at elevated temperatures.
  • What PCB layout practices are essential to maintain 12-bit performance when designing with the 20-TSSOP packaged AD7928BRUZ? The 20-TSSOP package (4.40 mm width) demands careful thermal and signal integrity management. Use a solid ground plane beneath the device and connect the exposed pad (if present on variant) to analog ground via multiple vias. Keep analog input traces short and away from digital signals (especially SCLK and SDATA). Route the reference voltage with a dedicated trace, avoiding shared paths with digital returns. Place decoupling capacitors as close as possible to the AVDD and DVDD pins, and ensure the analog and digital grounds meet at a single point near the ADC to minimize ground bounce.
  • Is the AD7928BRUZ suitable for industrial environments operating at –40°C, and what derating or compensation strategies should be applied? The AD7928BRUZ is rated for operation from –40°C to +85°C, making it suitable for industrial applications. However, at temperature extremes, internal switch resistance increases and reference buffer settling slows, potentially affecting INL and DNL. If using an external reference, account for its temperature coefficient in system calibration. For systems requiring consistent accuracy across the full range, periodic background calibration or software correction based on temperature sensors is advisable. Also, ensure that input signal source impedance remains stable over temperature to prevent charge injection errors during acquisition.
  • How does the SPI/DSP interface timing of the AD7928BRUZ affect compatibility with modern microcontrollers running at high clock speeds? The AD7928BRUZ supports SPI Mode 1 and 3 with a maximum SCLK frequency of 20 MHz. While this is sufficient for most MCU interfaces, timing margins shrink at higher speeds—especially with long PCB traces or capacitive loading. Ensure that the microcontroller’s SPI peripheral can meet the ADC’s t_CSH (CS hold time) and t_DS (data setup time) requirements. Use series termination resistors (22–33 Ω) on SCLK and SDATA lines to reduce reflections. If daisy-chaining multiple ADCs, verify that propagation delays do not violate the last device’s timing budget.
  • Are there drop-in or functionally compatible alternatives to the AD7928BRUZ that offer improved power efficiency or integrated references for space-constrained designs? While the AD7928BRUZ offers excellent speed and channel count in a compact TSSOP, alternatives like the AD7091R (1 MSPS, 12-bit, integrated reference, 1.8V operation) or the LTC2309 (8-channel, 12-bit, SPI, 2.7–5.25V) provide lower power or internal references but may trade off sampling rate or package size. The AD7928 remains preferable when external reference flexibility and full-speed 1 MSPS operation are required. Always verify pin compatibility and timing diagrams before substitution, as register structures and control logic differ between families.
  • What reliability and qualification standards apply to the AD7928BRUZ, and is it appropriate for automotive or mission-critical applications? The AD7928BRUZ is qualified to industrial temperature grades and complies with RoHS3, but it is not AEC-Q100 certified and lacks automotive-grade screening. It is suitable for industrial control, test equipment, and general-purpose DAQ systems, but not recommended for safety-critical automotive or aerospace applications without additional qualification. For high-reliability systems, consider the AD7928’s automotive-qualified variants (if available) or implement redundancy and fault monitoring in firmware.
  • How should input overvoltage protection be implemented for the AD7928BRUZ when measuring signals that may exceed the supply rails? The AD7928BRUZ inputs are not protected beyond the supply rails (AVDD + 0.3V absolute maximum). For transient or fault conditions, use Schottky diode clamps to AVDD and AGND with a series current-limiting resistor (e.g., 1 kΩ). Ensure the clamping diodes have low leakage (<1 nA at 85°C) to avoid offset errors. For sustained overvoltage risks, consider precision op-amp buffers with built-in fault protection or external TVS diodes rated below the ADC’s absolute maximum ratings.
  • What are the implications of the 0:55 S/H:ADC clock ratio in the AD7928BRUZ for dynamic signal acquisition? The 0:55 ratio indicates that the sample-and-hold acquires the input during the first 55 clock cycles of the total conversion period, leaving minimal time for multiplexer switching and signal settling—especially at 1 MSPS (55 ns acquisition window at 20 MHz SCLK). This constrains the maximum allowable source impedance and limits performance with capacitive sensors or long cables. For signals with bandwidth >10 kHz, use a unity-gain buffer to drive the ADC input and ensure settling within the acquisition window to avoid aperture error and code jitter.