The Tensor G4 chip, used in Google’s Pixel 8, is manufactured using Samsung’s 4nm process and offers only a minor upgrade over the Tensor G3. The Tensor G4 still employs Samsung’s older FOWLP (Fan-Out Wafer-Level Packaging) technology, rather than the newer FOPLP (Fan-Out Panel-Level Packaging). FOWLP, unlike previous generations, is able to address the overheating issues seen in the Exynos 2400 chip.
Now, Google plans to make significant changes with the Tensor G5 (for the Pixel 10), which will be built using TSMC’s latest 3nm process and TSMC’s advanced InFO-POP packaging technology. The Tensor G6, which will power the Pixel 11 series, will also be produced by TSMC, utilizing the cutting-edge 2nm process.
Apple previously revealed that two of its AI models, which support Apple Intelligence, were trained on Google’s Tensor Processing Unit (TPU) in the cloud. Google’s ARM-based TPU v5p “Axion,” designed specifically for data centers, is also manufactured using TSMC’s N3E (3nm) process.