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Burst of System-in-Package (SiP) A New Facade for the Semiconductor Industry
Now the world's No. 1 packaging and testing plant, Taiwan's Sun Moonlight Technology achieved a new high in revenue in Q3 this year, reaching NT $ 41.142 billion. The same scene is very similar to last year, when Sun Moonlight's revenue reached NT $ 39.276 billion. Both of these revenue bursts were related to SiP (system-in-package). According to estimates, the iPhone 11's system-in-package (SiP) and wireless communication integration modules continue to pull goods, so that ASE's fourth quarter results are expected to continue to grow.
According to the supply chain, Apple uses a large number of system-in-package (SiP) modules in its design, which means that it will continue to release a large number of SiP packaging and testing OEM orders next year; plus wireless Bluetooth headset AirPods will begin to introduce SiP technology and polish the technology For many years, ASE will become a big winner in the packaging and testing industry.
When Moore's Law gradually lost its charm, SiP technology ushered in the best time.
Becoming mainstream
SiP technology is born from MCM (Multi-Chip Module). It builds on existing packaging technologies, such as flip-chip, wire bonding, and fan-out wafer-level packaging. Since there has been no resistance to the advancement of Moore's Law, SiP has received less attention. When single-chip integration (SoC) progress has stalled, SiP, which can integrate multiple different systems, has become the industry's savior.
According to the standard definition, SiP is a single standard package that preferentially assembles multiple active electronic components and passive devices with different functions, and other devices such as MEMS or optical devices to achieve a certain function, forming a system or sub-system system.
Consistent with the purpose of integrating more functions in the SoC, SiP also has to swallow more functions in a smaller body. The difference is that SiP integrates multiple different chips side by side or superimposed together, and the SoC itself is a chip.
Chip makers started doing this a long time ago, but only Apple Corps joined the ranks and completely exploded the market. The following figure is the disassembly of the Apple Watch S1 chip. As can be seen from the figure, 30 independent components are packaged in a 26mm × 28mm chip.
Qualcomm's Qualcomm Snapdragon System-in-Package (QSiP) module is also the product of similar technologies. QSiP puts more than 400 components such as application processors, power management, RF front-ends, WiFi connection chips, audio codecs, and memory in a module, which greatly reduces the space requirements of the motherboard, thereby providing functions such as batteries and cameras Provides more space.
There are several areas where SiP is currently most applied. The first is the radio frequency field. The PA in the mobile phone is the SiP module, which integrates functions such as multi-frequency power amplifier, power control, and transceiver switch. The second is automotive electronics, including power device system-level packaging and radar. The third is interconnection (Wi-Fi / Bluetooth), MEMS / sensors, camera modules, etc. in consumer electronics. However, do not take Kirin 990 5G, MediaTek 1000 and Qualcomm 765 as SiP, they are all SoCs.
Jane and Fan
Problems such as power density and heat dissipation have plagued traditional chip processes, as well as disturbing wiring blockages, RC delays, electromigration, and electrostatic discharge and electromagnetic interference. The emergence of SiP has brought new ideas to solve these problems.
For example, analog modules that are sensitive to digital noise and thermal effects can be kept at a distance from digital modules. Secondly, all modules and chiplets (small chips) are in one package to form a large IP, which makes IP reuse simple. Finally, by increasing the diameter of the connections between the chips and shortening the distance of signal transmission, performance can be improved and power consumption can be reduced, which in turn can reduce the power required to drive these signals.
SiP technology is developing rapidly and has formed many different implementations. If it is distinguished according to the arrangement of the modules, it can be roughly divided into a planar 2D package and a 3D package structure. Compared to 2D packaging, the use of stacked 3D packaging technology can increase the number of wafers or modules used, thereby increasing the number of layers that can be placed in the vertical direction, further enhancing the functional integration of SIP technology. In SiP, you can use simple wire bonding, Flip Chip, or a combination of the two.
In addition, you can also use the multifunctional substrate to integrate the components-different components are built in the multifunctional substrate to achieve the purpose of functional integration. Different chip arrangements, combined with different internal bonding technologies, make the SIP package form a variety of combinations, and can be customized or flexibly produced according to the needs of customers or products.
Many semiconductor manufacturers have their own SiP technology, and the names may be different. For example, Intel is called EMIB and TSMC is called SoIC. But industry insiders point out that these are SiP technologies, and the difference lies in the process technology. Take TSMC as an example, it uses semiconductor equipment to do the packaging process. The advantages of TSMC's SiP technology are wafer-level packaging. The technology is mature and the yield is high, which is difficult for ordinary packaging and testing manufacturers to achieve.
Chase and surpass
Since it is an irreversible trend, each packaging and testing factory is developing its own SiP technology. However, this is not an easy task. "SiP concepts are easy to understand, but the design and process are complicated, and high-end technology is not easy to master." Semiconductor expert Mo Dakang told reporters.
Packaging and testing plants need to master SiP technology, in fact, they must learn a variety of packaging technologies. Such as ultra-low arc wire bonding technology, narrow-pitch wire bonding technology, new chip bonding (DAF, FOW, etc.) technology, new wire bonding materials, narrow-pitch copper pillar flip-chip bump technology, and micro-bump (Micro Bumping) technology. In addition, fan-out wafer-level packaging (FOWLP), TSV stacked packaging with TSV technology (etching and filling), wafer thinning and rewiring processes, chip / wafer bonding stacking as core technologies are also necessary to master of. Without years of accumulation, SiP is not something that can be played around casually.
Taiwan's Sun Moonlight is an early SiP investor in a packaging and testing plant. It is also one of the most extensive packaging plants with system-level packaging technology, covering nearly ten packaging technologies including FCBGA, FOCoS, and 2.5D packaging. Especially thanks to Apple's large order, Sun Moonlight's system-level packaging revenue has grown at a rate of hundreds of millions of dollars in the past few years.
In mainland China, where the world's largest concentration of packaging and testing plants, Changdian Technology, Tongfu Microelectronics, and Huatian Technology have ranked in the top ten worldwide for many years. In terms of SiP, what is the overall level of the mainland? "The highest level is not far away from the international leading level." Sun Yuanfeng, chief analyst of Huaxi Electronics, said. He further stated that "Changdian Korea, a subsidiary of Changdian Technology, is actively deploying the system-in-package (SiP) business and has entered the end product supply chain of mobile phones and wearable devices in South Korea. Customers include Samsung and LG."
Domestic companies started in the SiP field not too late. In recent years, through mergers and acquisitions, they have rapidly accumulated advanced packaging technology, and the technology platform has basically synchronized with overseas manufacturers. For example, Changdian Technology United Industry Fund and Chipden Semiconductor acquired Singapore's packaging and testing plant Xingke Jinpeng, which possesses advanced packaging technologies such as WLSCP, SiP, PoP, and has achieved mass production. However, the overall advanced packaging revenue as a percentage of total revenue still has a certain gap with Taiwan and the United States.
There is still a question: Does the domestic chip industry make full use of these technology platforms? "A lot of companies are using it, most of them are relatively low-end, just simple sealing." Zhang Yunxiang, director of investment of Tibet Lemerus Venture Capital Co., Ltd. pointed out.
"SiP requires a variety of chips to be put together. These chips are often not produced by one manufacturer. It is not easy to collect Wafer from so many manufacturers. Large companies such as Apple have such a appeal, and generally small and medium companies No way to do it, "he explained.
Fortunately, the situation has gradually changed. As the number of domestic chips increases and the performance improves, this kind of chip panic is slowly alleviating. With the mass production of independently developed memory in the future, and the 5G commercial implementation, AIoT and automotive electronics innovation, the explosion of SiP technology has entered the countdown.
According to the supply chain, Apple uses a large number of system-in-package (SiP) modules in its design, which means that it will continue to release a large number of SiP packaging and testing OEM orders next year; plus wireless Bluetooth headset AirPods will begin to introduce SiP technology and polish the technology For many years, ASE will become a big winner in the packaging and testing industry.
When Moore's Law gradually lost its charm, SiP technology ushered in the best time.
Becoming mainstream
SiP technology is born from MCM (Multi-Chip Module). It builds on existing packaging technologies, such as flip-chip, wire bonding, and fan-out wafer-level packaging. Since there has been no resistance to the advancement of Moore's Law, SiP has received less attention. When single-chip integration (SoC) progress has stalled, SiP, which can integrate multiple different systems, has become the industry's savior.
According to the standard definition, SiP is a single standard package that preferentially assembles multiple active electronic components and passive devices with different functions, and other devices such as MEMS or optical devices to achieve a certain function, forming a system or sub-system system.
Consistent with the purpose of integrating more functions in the SoC, SiP also has to swallow more functions in a smaller body. The difference is that SiP integrates multiple different chips side by side or superimposed together, and the SoC itself is a chip.
Chip makers started doing this a long time ago, but only Apple Corps joined the ranks and completely exploded the market. The following figure is the disassembly of the Apple Watch S1 chip. As can be seen from the figure, 30 independent components are packaged in a 26mm × 28mm chip.
Qualcomm's Qualcomm Snapdragon System-in-Package (QSiP) module is also the product of similar technologies. QSiP puts more than 400 components such as application processors, power management, RF front-ends, WiFi connection chips, audio codecs, and memory in a module, which greatly reduces the space requirements of the motherboard, thereby providing functions such as batteries and cameras Provides more space.
There are several areas where SiP is currently most applied. The first is the radio frequency field. The PA in the mobile phone is the SiP module, which integrates functions such as multi-frequency power amplifier, power control, and transceiver switch. The second is automotive electronics, including power device system-level packaging and radar. The third is interconnection (Wi-Fi / Bluetooth), MEMS / sensors, camera modules, etc. in consumer electronics. However, do not take Kirin 990 5G, MediaTek 1000 and Qualcomm 765 as SiP, they are all SoCs.
Jane and Fan
Problems such as power density and heat dissipation have plagued traditional chip processes, as well as disturbing wiring blockages, RC delays, electromigration, and electrostatic discharge and electromagnetic interference. The emergence of SiP has brought new ideas to solve these problems.
For example, analog modules that are sensitive to digital noise and thermal effects can be kept at a distance from digital modules. Secondly, all modules and chiplets (small chips) are in one package to form a large IP, which makes IP reuse simple. Finally, by increasing the diameter of the connections between the chips and shortening the distance of signal transmission, performance can be improved and power consumption can be reduced, which in turn can reduce the power required to drive these signals.
SiP technology is developing rapidly and has formed many different implementations. If it is distinguished according to the arrangement of the modules, it can be roughly divided into a planar 2D package and a 3D package structure. Compared to 2D packaging, the use of stacked 3D packaging technology can increase the number of wafers or modules used, thereby increasing the number of layers that can be placed in the vertical direction, further enhancing the functional integration of SIP technology. In SiP, you can use simple wire bonding, Flip Chip, or a combination of the two.
In addition, you can also use the multifunctional substrate to integrate the components-different components are built in the multifunctional substrate to achieve the purpose of functional integration. Different chip arrangements, combined with different internal bonding technologies, make the SIP package form a variety of combinations, and can be customized or flexibly produced according to the needs of customers or products.
Many semiconductor manufacturers have their own SiP technology, and the names may be different. For example, Intel is called EMIB and TSMC is called SoIC. But industry insiders point out that these are SiP technologies, and the difference lies in the process technology. Take TSMC as an example, it uses semiconductor equipment to do the packaging process. The advantages of TSMC's SiP technology are wafer-level packaging. The technology is mature and the yield is high, which is difficult for ordinary packaging and testing manufacturers to achieve.
Chase and surpass
Since it is an irreversible trend, each packaging and testing factory is developing its own SiP technology. However, this is not an easy task. "SiP concepts are easy to understand, but the design and process are complicated, and high-end technology is not easy to master." Semiconductor expert Mo Dakang told reporters.
Packaging and testing plants need to master SiP technology, in fact, they must learn a variety of packaging technologies. Such as ultra-low arc wire bonding technology, narrow-pitch wire bonding technology, new chip bonding (DAF, FOW, etc.) technology, new wire bonding materials, narrow-pitch copper pillar flip-chip bump technology, and micro-bump (Micro Bumping) technology. In addition, fan-out wafer-level packaging (FOWLP), TSV stacked packaging with TSV technology (etching and filling), wafer thinning and rewiring processes, chip / wafer bonding stacking as core technologies are also necessary to master of. Without years of accumulation, SiP is not something that can be played around casually.
Taiwan's Sun Moonlight is an early SiP investor in a packaging and testing plant. It is also one of the most extensive packaging plants with system-level packaging technology, covering nearly ten packaging technologies including FCBGA, FOCoS, and 2.5D packaging. Especially thanks to Apple's large order, Sun Moonlight's system-level packaging revenue has grown at a rate of hundreds of millions of dollars in the past few years.
In mainland China, where the world's largest concentration of packaging and testing plants, Changdian Technology, Tongfu Microelectronics, and Huatian Technology have ranked in the top ten worldwide for many years. In terms of SiP, what is the overall level of the mainland? "The highest level is not far away from the international leading level." Sun Yuanfeng, chief analyst of Huaxi Electronics, said. He further stated that "Changdian Korea, a subsidiary of Changdian Technology, is actively deploying the system-in-package (SiP) business and has entered the end product supply chain of mobile phones and wearable devices in South Korea. Customers include Samsung and LG."
Domestic companies started in the SiP field not too late. In recent years, through mergers and acquisitions, they have rapidly accumulated advanced packaging technology, and the technology platform has basically synchronized with overseas manufacturers. For example, Changdian Technology United Industry Fund and Chipden Semiconductor acquired Singapore's packaging and testing plant Xingke Jinpeng, which possesses advanced packaging technologies such as WLSCP, SiP, PoP, and has achieved mass production. However, the overall advanced packaging revenue as a percentage of total revenue still has a certain gap with Taiwan and the United States.
There is still a question: Does the domestic chip industry make full use of these technology platforms? "A lot of companies are using it, most of them are relatively low-end, just simple sealing." Zhang Yunxiang, director of investment of Tibet Lemerus Venture Capital Co., Ltd. pointed out.
"SiP requires a variety of chips to be put together. These chips are often not produced by one manufacturer. It is not easy to collect Wafer from so many manufacturers. Large companies such as Apple have such a appeal, and generally small and medium companies No way to do it, "he explained.
Fortunately, the situation has gradually changed. As the number of domestic chips increases and the performance improves, this kind of chip panic is slowly alleviating. With the mass production of independently developed memory in the future, and the 5G commercial implementation, AIoT and automotive electronics innovation, the explosion of SiP technology has entered the countdown.